1. Field of the Invention
The present invention relates to a power amplifier, and more particularly, to a power amplifier capable of supplying variable bias to an amplifier circuit by accurately transferring the envelope components of an input signal during the supply of active bias power to the amplifier circuit.
2. Description of the Related Art
Recently, blocks configuring a wireless transceiver are being integrated into a single chip by using a complementary metal oxide semiconductor (CMOS) process technology. In this process, only the power amplifier, among the blocks of the wireless transceiver, is implemented by an indium gallium phosphide (InGaP)/gallium arsenide (GaAs) Heterojunction Bipolar Transistor (HBT) process. However, in the above-mentioned InGaP/GaAs HBT process, manufacturing costs are increased and the power amplifier is formed in a multi-chip structure and thus, it is difficult to couple the power amplifier with an adjustment circuit block implemented by the CMOS process in order to improve linearity, as compared with the CMOS process. For this reason, research into a CMOS process based power amplifier has been actively conducted.
The amplification circuit of the power amplifier is supplied with the bias power to amplify and output an input signal. Generally, the amplification circuit of the power amplifier is supplied with bias power having a preset voltage level.
Meanwhile, a main index evaluating the performance of the power amplifier may include maximum output power (maximum linear output) and maximum efficiency up to a point in which linearity are satisfied greatly and efficiency at a point in which the maximum output power is backed-off.
Comparing with the HBT process, the CMOS process slightly degrades the performance of the power amplifier. As a result, it is a recent trend to supply active bias power in order to increase linearity at the time of implementing the power amplifier using the CMOS process.
FIG. 1 is a schematic configuration diagram of a power amplifier according to the related art and FIGS. 2A and 2B are graphs showing electrical characteristics of the power amplifier according to the related art of FIG. 1.
Reference to FIG. 1, the power amplifier according to the related art may be configured to include an amplifier 11 amplifying an input signal Pin and outputting it as an output signal Pout, a detector 12 detecting a voltage level of the input signal Pin to the amplifier 11, and a voltage generator 13 generating voltage varied according to the detection result of the detector 12 and supplying it to the amplifier 11.
Referring to FIGS. 1, 2A, and 2B, the power amplifier according to the related art delays the bias power from the voltage generator 13 and the input signal Pin, such that the linearity of the output signal Pout from the power amplifier at this point A is degraded as compared with a power amplifier supplying a fixing bias.